OPB_CENTRAL_DMA

This is a discussion on OPB_CENTRAL_DMA within the Arch forums in Other Technologies category; Has anybody used central_dma to copy data between peripherals and processors, or between two buffers in bram mermory. I have added it to the design and configure but, I receive a DMA BUS TIMEOUT. Best Regards...

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  #1  
Old 07-03-2008, 09:32 AM
Default OPB_CENTRAL_DMA

Has anybody used central_dma to copy data between peripherals and
processors, or between two buffers in bram mermory. I have added it to
the design and configure but, I receive a DMA BUS TIMEOUT.

Best Regards
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  #2  
Old 07-04-2008, 05:34 AM
Default Re: OPB_CENTRAL_DMA

On Jul 3, 2:32*pm, Pablo wrote:
> Has anybody used central_dma to copy data between peripherals and
> processors, or between two buffers in bram mermory. I have added it to
> the design and configure but, I receive a DMA BUS TIMEOUT.
>
> Best Regards


Obviously one of the addresses you are trying to access does not
exist. Check the address map.
Otherwise the CENTRAL_DMA has low performance since the data needs to
travel twice: source_peripheral -> DMA and DMA ->
destination_peripheral
Not to mention that is not capable of long bursts.

Cheers,

Guru

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  #3  
Old 07-04-2008, 07:40 AM
Default Re: OPB_CENTRAL_DMA

On Jul 4, 10:34 am, Guru wrote:
> On Jul 3, 2:32 pm, Pablo wrote:
>
> > Has anybody used central_dma to copy data between peripherals and
> > processors, or between two buffers in bram mermory. I have added it to
> > the design and configure but, I receive a DMA BUS TIMEOUT.

>
> > Best Regards

>
> Obviously one of the addresses you are trying to access does not
> exist. Check the address map.


This was my first opinion, so I create two buffers in internal memory
as follows:

#include "xparameters.h"
#include "xdmacentral.h"
#include "xutil.h"

//================================================== ==
#define uint unsigned int
void dma_init(uint config);
void dma_transfer (int *src, int *dst, uint length);

int main (void) {
int i;
int array[100];
int array1[100];
for (i = 0; i < 100 ; i++) {
array[i]=1;
array1[i]=0;
}
dma_init(0xC0000004);
dma_transfer(&array[0],&array1[0],60);
return 0;
}



// Function to control DMA

void dma_init(uint config) {
int *dma = (int *)0x41e00000;
*dma = 0xA; // Reset
dma++;
*dma = config; // Config
}
void dma_transfer (int *src, int *dst, uint length) {
int *dma = (int *)0x41e00008;
*dma = (int)src; // Src Address
dma++;
*dma = (int)dst;
dma++;
*dma = length;




> Otherwise the CENTRAL_DMA has low performance since the data needs to
> travel twice: source_peripheral -> DMA and DMA ->
> destination_peripheral
> Not to mention that is not capable of long bursts.
>


Is it possible to avoid this timeout?

> Cheers,
>
> Guru


Guru I have seen a post in which you said that dma registers are
located at:
baseaddr + 0x400.

but in the documentation it said that registers positions are:
baseaddr + 0x4.

am I ok?

again, my best regards

pablo

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  #4  
Old 07-05-2008, 03:48 PM
Default Re: OPB_CENTRAL_DMA

"Pablo" wrote in message
news:2f27c020-f771-40e2-86b0-05d0675f3290-at-34g2000hsf.googlegroups.com...
> int main (void) {
> int i;
> int array[100];
> int array1[100];
> for (i = 0; i < 100 ; i++) {
> array[i]=1;
> array1[i]=0;
> }
> dma_init(0xC0000004);
> dma_transfer(&array[0],&array1[0],60);
> return 0;
> }


Where is the stack memory?


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  #5  
Old 07-07-2008, 04:58 AM
Default Re: OPB_CENTRAL_DMA

On Jul 5, 7:48 pm, "MikeWhy" wrote:
> "Pablo" wrote in message
>
> news:2f27c020-f771-40e2-86b0-05d0675f3290-at-34g2000hsf.googlegroups.com...
>
> > int main (void) {
> > int i;
> > int array[100];
> > int array1[100];
> > for (i = 0; i < 100 ; i++) {
> > array[i]=1;
> > array1[i]=0;
> > }
> > dma_init(0xC0000004);
> > dma_transfer(&array[0],&array1[0],60);
> > return 0;
> > }

>
> Where is the stack memory?


Everything resides on Internal BRAM.
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  #6  
Old 07-08-2008, 10:54 AM
Default Re: OPB_CENTRAL_DMA

On Jul 4, 12:40*pm, Pablo wrote:
> On Jul 4, 10:34 am, Guru wrote:
>
> > On Jul 3, 2:32 pm, Pablo wrote:

>
> > > Has anybody used central_dma to copy data between peripherals and
> > > processors, or between two buffers in bram mermory. I have added it to
> > > the design and configure but, I receive a DMA BUS TIMEOUT.

>
> > > Best Regards

>
> > Obviously one of the addresses you are trying to access does not
> > exist. Check the address map.

>
> This was my first opinion, so I create two buffers in internal memory
> as follows:
>
> #include "xparameters.h"
> #include "xdmacentral.h"
> #include "xutil.h"
>
> //================================================== ==
> #define uint * *unsigned int
> void dma_init(uint config);
> void dma_transfer (int *src, int *dst, uint length);
>
> int main (void) {
> * * * * int i;
> * * * * int array[100];
> * * * * int array1[100];
> * * * * for (i = 0; i < 100 ; i++) {
> * * * * * * * * array[i]=1;
> * * * * * * * * array1[i]=0;
> * * * * }
> * * * * dma_init(0xC0000004);
> * * * * dma_transfer(&array[0],&array1[0],60);
> * * * * return 0;
>
> }
>
> // Function to control DMA
>
> void dma_init(uint config) {
> * * * * int *dma = (int *)0x41e00000;
> * * * * *dma = 0xA; // Reset
> * * * * dma++;
> * * * * *dma = config; // Config}
>
> void dma_transfer (int *src, int *dst, uint length) {
> * * * * int *dma = (int *)0x41e00008;
> * * * * *dma = (int)src; // Src Address
> * * * * dma++;
> * * * * *dma = (int)dst;
> * * * * dma++;
> * * * * *dma = length;
>
> > Otherwise the CENTRAL_DMA has low performance since the data needs to
> > travel twice: source_peripheral -> DMA and DMA ->
> > destination_peripheral
> > Not to mention that is not capable of long bursts.

>
> Is it possible to avoid this timeout?
>
> > Cheers,

>
> > Guru

>
> Guru I have seen a post in which you said that dma registers are
> located at:
> baseaddr + 0x400.
>
> but in the documentation it said that registers positions are:
> baseaddr + 0x4.
>
> am I ok?
>
> again, my best regards
>
> pablo


Use the predefined functions (driver) for DMA engine.
Verify the DMA registers, source and destiantion operation using
XIo_Out32 and XIo_In32 as defined in "xio.h".
The timeout only happens if somethins is WRONG.
You could identify the problem using the Chipscope bus analyser, but
that is another story.

Cheers,

Guru
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