Intel details future Larrabee graphics chip

http://news.cnet.com/8301-13924_3-10005391-64.html


Intel has disclosed details on a chip that will compete directly with
Nvidia and ATI and may take it into unchartered technological and
market-segment waters.

Larrabee will be a stand-alone chip, meaning it will be very different
than the low-end--but widely used--integrated graphics that Intel now
offers as part of the silicon that accompanies its processors. And
Larrabee will be based on the universal Intel x86 architecture.

The first Larrabee product will be "targeted at the personal computer
market," according to Intel. This means the PC gaming market--putting
Nvidia and AMD-ATI directly into Intel's sights. Nvidia and AMD-ATI
currently dominate the market for "discrete" or stand-alone graphics
processing units.

http://i.i.com.com/cnwk.1d/i/bto/200...ee-2-small.jpg

Larry Seiler (standing, middle), a senior Intel engineer, and Stephen
Junkins (sitting, right), an Intel graphics software architect, speak
at a briefing on Larrabee chip, due in 2009-2010.
(Credit: Brooke Crothers)

As Intel sees it, Larrabee combines the best attributes of a central
processing unit (CPU) with a graphics processor. "The thing we need is
an architecture that combines the full programmability of the CPU with
the kinds of parallelism and other special capabilities of graphics
processors. And that architecture is Larrabee," Larry Seiler, a senior
principal engineer in Intel's Visual Computing Group, said at a
briefing on Larrabee in San Francisco last week.

"It is not a GPU as many have mistakenly described it, but it can do
most graphics functions," Jon Peddie of Jon Peddie Research, said in
an article he posted Friday about Larrabee.

"It looks like a GPU and acts like a GPU but actually what it's doing
is introducing a large number of x86 cores into your PC," said Intel
spokesperson Nick Knupffer, alluding to the myriad ways Larrabee could
be used beyond just graphics processing. In addition to the PC, high-
performance computing and workstations are two potential markets that
were also mentioned.

Intel describes it in a statement as "the industry's first many-core
x86 Intel architecture." The chipmaker currently offers quad-core
processors and will offer eight-core processors based on its Nehalem
architecture, but Larrabee is expected to have dozens of cores and,
later, possibly hundreds.

The number of cores in each Larrabee chip may vary, according to
market segment. Intel showed a slide with core counts ranging from 8
to 48, claiming performance scales almost linearly as more cores are
added: that is, 16 cores will offer twice the performance of eight
cores.

The individual cores in Larrabee are derived from the Intel Pentium
processor and "then we added 64-bit instructions and multi-threading,"
Seiler said. Each core has 256 kilobytes of level-2 cache allowing the
size of the cache to scale with the total number of cores, according
to Seiler. And application programming interfaces (APIs) such as
Microsoft's DirectX and Apple's Open CL can be tapped. "Larrabee does
not require a special API. Larrabee will excel on standard graphics
APIs," he said. "So existing games will be able to run on Larrabee
products."

So, what is Larrabee's market potential? Today, the graphics chip
market is approaching 400 million units a year and has consolidated
into a handful of suppliers. "And of that population, two suppliers,
ATI and Nvidia, own 98 percent of the discrete GPU business."
according to Peddie.

"And the trend line indicates a flattening to decline in the
business...However, Intel is no light-weight start up, and to enter
the market today a company has to have a major infrastructure, deep IP
(intellectual property), and marketing prowess--Intel has all that and
more," Peddie said.


http://i.i.com.com/cnwk.1d/i/bto/200...lide-small.jpg

Larrabee combines aspects of a CPU and GPU
(Credit: Intel)

Though more details will be provided at Siggraph 2008, some key
Larrabee features:

Larrabee programming model: supports a variety of highly parallel
applications, including those that use irregular data structures. This
enables development of graphics APIs, rapid innovation of new graphics
algorithms, and true general purpose computation on the graphics
processor with established PC software development tools.

Software-based scheduling: Larrabee features task scheduling which is
performed entirely with software, rather than in fixed function logic.
Therefore rendering pipelines and other complex software systems can
adjust their resource scheduling based each workload's unique
computing demand.

Execution threads: Larrabee architecture supports four execution
threads per core with separate register sets per thread. This allows
the use of a simple efficient in-order pipeline, but retains many of
the latency-hiding benefits of more complex out-of-order pipelines
when running highly parallel applications.

Ring network: Larrabee uses a 1024 bits-wide, bi-directional ring
network (i.e., 512 bits in each direction) to allow agents to
communicate with each other in low latency manner resulting in super
fast communication between cores.

"A key characteristic of this vector processor is a property we call
being vector complete...You can run 16 pixels in parallel, 16 vertices
in parallel, or 16 more general program indications in parallel,"
Seiler said.

Here's the paper from Intel's website:
http://softwarecommunity.intel.com/U...e_manycore.pdf

"NV55" wrote in message
news:eb967390-17aa-499c-9c6d-d0e7f2bc3258-at-m45g2000hsb.googlegroups.com...
> http://news.cnet.com/8301-13924_3-10005391-64.html
>
>
> Intel has disclosed details on a chip that will compete directly with
> Nvidia and ATI and may take it into unchartered technological and
> market-segment waters.
>
> Larrabee will be a stand-alone chip, meaning it will be very different
> than the low-end--but widely used--integrated graphics that Intel now
> offers as part of the silicon that accompanies its processors. And
> Larrabee will be based on the universal Intel x86 architecture.
>
> The first Larrabee product will be "targeted at the personal computer
> market," according to Intel. This means the PC gaming market--putting
> Nvidia and AMD-ATI directly into Intel's sights. Nvidia and AMD-ATI
> currently dominate the market for "discrete" or stand-alone graphics
> processing units.
>
> http://i.i.com.com/cnwk.1d/i/bto/200...ee-2-small.jpg
>
> Larry Seiler (standing, middle), a senior Intel engineer, and Stephen
> Junkins (sitting, right), an Intel graphics software architect, speak
> at a briefing on Larrabee chip, due in 2009-2010.
> (Credit: Brooke Crothers)
>
> As Intel sees it, Larrabee combines the best attributes of a central
> processing unit (CPU) with a graphics processor. "The thing we need is
> an architecture that combines the full programmability of the CPU with
> the kinds of parallelism and other special capabilities of graphics
> processors. And that architecture is Larrabee," Larry Seiler, a senior
> principal engineer in Intel's Visual Computing Group, said at a
> briefing on Larrabee in San Francisco last week.
>
> "It is not a GPU as many have mistakenly described it, but it can do
> most graphics functions," Jon Peddie of Jon Peddie Research, said in
> an article he posted Friday about Larrabee.
>
> "It looks like a GPU and acts like a GPU but actually what it's doing
> is introducing a large number of x86 cores into your PC," said Intel
> spokesperson Nick Knupffer, alluding to the myriad ways Larrabee could
> be used beyond just graphics processing. In addition to the PC, high-
> performance computing and workstations are two potential markets that
> were also mentioned.
>
> Intel describes it in a statement as "the industry's first many-core
> x86 Intel architecture." The chipmaker currently offers quad-core
> processors and will offer eight-core processors based on its Nehalem
> architecture, but Larrabee is expected to have dozens of cores and,
> later, possibly hundreds.
>
> The number of cores in each Larrabee chip may vary, according to
> market segment. Intel showed a slide with core counts ranging from 8
> to 48, claiming performance scales almost linearly as more cores are
> added: that is, 16 cores will offer twice the performance of eight
> cores.
>
> The individual cores in Larrabee are derived from the Intel Pentium
> processor and "then we added 64-bit instructions and multi-threading,"
> Seiler said. Each core has 256 kilobytes of level-2 cache allowing the
> size of the cache to scale with the total number of cores, according
> to Seiler. And application programming interfaces (APIs) such as
> Microsoft's DirectX and Apple's Open CL can be tapped. "Larrabee does
> not require a special API. Larrabee will excel on standard graphics
> APIs," he said. "So existing games will be able to run on Larrabee
> products."
>
> So, what is Larrabee's market potential? Today, the graphics chip
> market is approaching 400 million units a year and has consolidated
> into a handful of suppliers. "And of that population, two suppliers,
> ATI and Nvidia, own 98 percent of the discrete GPU business."
> according to Peddie.
>
> "And the trend line indicates a flattening to decline in the
> business...However, Intel is no light-weight start up, and to enter
> the market today a company has to have a major infrastructure, deep IP
> (intellectual property), and marketing prowess--Intel has all that and
> more," Peddie said.
>
>
> http://i.i.com.com/cnwk.1d/i/bto/200...lide-small.jpg
>
> Larrabee combines aspects of a CPU and GPU
> (Credit: Intel)
>
> Though more details will be provided at Siggraph 2008, some key
> Larrabee features:
>
> Larrabee programming model: supports a variety of highly parallel
> applications, including those that use irregular data structures. This
> enables development of graphics APIs, rapid innovation of new graphics
> algorithms, and true general purpose computation on the graphics
> processor with established PC software development tools.
>
> Software-based scheduling: Larrabee features task scheduling which is
> performed entirely with software, rather than in fixed function logic.
> Therefore rendering pipelines and other complex software systems can
> adjust their resource scheduling based each workload's unique
> computing demand.
>
> Execution threads: Larrabee architecture supports four execution
> threads per core with separate register sets per thread. This allows
> the use of a simple efficient in-order pipeline, but retains many of
> the latency-hiding benefits of more complex out-of-order pipelines
> when running highly parallel applications.
>
> Ring network: Larrabee uses a 1024 bits-wide, bi-directional ring
> network (i.e., 512 bits in each direction) to allow agents to
> communicate with each other in low latency manner resulting in super
> fast communication between cores.
>
> "A key characteristic of this vector processor is a property we call
> being vector complete...You can run 16 pixels in parallel, 16 vertices
> in parallel, or 16 more general program indications in parallel,"
> Seiler said.

"NV55" wrote in message
news:eb967390-17aa-499c-9c6d-d0e7f2bc3258-at-m45g2000hsb.googlegroups.com...
> http://news.cnet.com/8301-13924_3-10005391-64.html
>
>
> Intel has disclosed details on a chip that will compete directly with
> Nvidia and ATI and may take it into unchartered technological and
> market-segment waters.
>
> Larrabee will be a stand-alone chip, meaning it will be very different
> than the low-end--but widely used--integrated graphics that Intel now
> offers as part of the silicon that accompanies its processors. And
> Larrabee will be based on the universal Intel x86 architecture.
[...]

Are they saying that programming this chip will be easier than programming a
GPU because it honors the well established x86 arch?

"Chris M. Thomasson" wrote in message
news:kXPlk.7164$QX3.5075-at-newsfe02.iad...

> Are they saying that programming this chip will be easier than programming
> a GPU because it honors the well established x86 arch?

http://anandtech.com/cpuchipsets/int...spx?i=3367&p=8

"
To the developer, it appears as exactly what it is - an arrangement of fully
cache coherent x86 microprocessors. The first iteration of Larrabee will
hide this fact from the OS through its graphics driver, but future versions
of the chip could conceivably populate task manager just like your desktop
x86 cores do today.

You have two options for harnessing the power of Larrabee: writing standard
DirectX/OpenGL code, or writing directly to the hardware using Larrabee
C/C++, which as it turns out is standard C (you can use compilers from MS,
Intel, GCC, etc...). In a sense, this is no different than what NVIDIA
offers with its GPUs - they will run DirectX/OpenGL code, or they can also
run C-code thanks to CUDA. The difference here is that writing directly to
Larrabee gives you some additional programming flexibility thanks to the GPU
being an array of fully functional x86 GPUs. Programming for x86
architectures is a paradigm that the software community as a whole is used
to, there's no learning curve, no new hardware limitations to worry about
and no waiting on additional iterations of CUDA to enable new features. You
treat Larrabee like you treat your host CPU. "

"Chris M. Thomasson" writes:

> "NV55" wrote in message
> news:eb967390-17aa-499c-9c6d-d0e7f2bc3258-at-m45g2000hsb.googlegroups.com...
>> http://news.cnet.com/8301-13924_3-10005391-64.html
>>
>>
>> Larrabee will be a stand-alone chip, meaning it will be very different
>> than the low-end--but widely used--integrated graphics that Intel now
>> offers as part of the silicon that accompanies its processors. And
>> Larrabee will be based on the universal Intel x86 architecture.
> [...]
>
> Are they saying that programming this chip will be easier than
> programming a GPU because it honors the well established x86 arch?

They are, and it is utter fertilizer from male cattle.

Intel seems keen on convincing everyone that the x86 ISA is superior
to all others in all areas where you use processors, because it is
"well known" and "compatible". But in terms of compatibility, the
only advantage of x86 is for desktop Windows, and that is not
interesting in embedded areas or for GPUs. As for being "well known",
that only matters for assembler programmers, and there are probably
more who program ARM assembler or 8051 assembler than x86 assembler.

Torben

"Chris M. Thomasson" wrote in message news:kXPlk.7164$QX3.5075-at-newsfe02.iad...
>
> "NV55" wrote in message
> news:eb967390-17aa-499c-9c6d-d0e7f2bc3258-at-m45g2000hsb.googlegroups.com...
>> http://news.cnet.com/8301-13924_3-10005391-64.html
>>
>>
>> Intel has disclosed details on a chip that will compete directly with
>> Nvidia and ATI and may take it into unchartered technological and
>> market-segment waters.
>>
>> Larrabee will be a stand-alone chip, meaning it will be very different
>> than the low-end--but widely used--integrated graphics that Intel now
>> offers as part of the silicon that accompanies its processors. And
>> Larrabee will be based on the universal Intel x86 architecture.
> [...]
>
> Are they saying that programming this chip will be easier than programming a GPU because it honors the well
> established x86 arch?

That's rubbish indeed. The cache coherency seems to be the only advantage
as other GPU also support C. However the claimed x86 "compatibility" isn't. If
you use C the ISA doesn't matter much, and if you write assembler then there is
no compatibility as the new SIMD instructions don't exist on any current x86's
and Larrabee doesn't appear to support SSE instructions either...

It would have made far more sense to use a simpler and more streamlined
ISA which would give a significant codesize, area and power saving, if not
a performance boost. But Intel is always keen to push their inefficient ISA
where it doesn't belong...

Wilco

As the number of cores goes up the watt requirements goes up too ?

Will we need a zillion watts of power soon ?

Bye,
Skybuck.

Skybuck Flying wrote:
> As the number of cores goes up the watt requirements goes up too ?
>
> Will we need a zillion watts of power soon ?
>
> Bye,
> Skybuck.

Since the ATI Radeon™ HD 4800 series has 800 cores you work it out.

--
Dirk

http://www.transcendence.me.uk/ - Transcendence UK
http://www.theconsensus.org/ - A UK political party
http://www.onetribe.me.uk/wordpress/?cat=5 - Our podcasts on weird stuff

On Tue, 5 Aug 2008 13:30:52 +0200, "Skybuck Flying"
wrote:

>As the number of cores goes up the watt requirements goes up too ?

Not necessarily, if the technology progresses and the clock rates are
kept reasonable. And one can always throttle down the CPUs that aren't
busy.

>
>Will we need a zillion watts of power soon ?
>
>Bye,
> Skybuck.
>

I saw suggestions of something like 60 cores, 240 threads in the
reasonable future.

This has got to affect OS design.

John

Wilco Dijkstra wrote:
>
> "Chris M. Thomasson" wrote in message news:kXPlk.7164$QX3.5075-at-newsfe02.iad...
> >
> > "NV55" wrote in message
> > news:eb967390-17aa-499c-9c6d-d0e7f2bc3258-at-m45g2000hsb.googlegroups.com...
> >> http://news.cnet.com/8301-13924_3-10005391-64.html
> >>
> >>
> >> Intel has disclosed details on a chip that will compete directly with
> >> Nvidia and ATI and may take it into unchartered technological and
> >> market-segment waters.
> >>
> >> Larrabee will be a stand-alone chip, meaning it will be very different
> >> than the low-end--but widely used--integrated graphics that Intel now
> >> offers as part of the silicon that accompanies its processors. And
> >> Larrabee will be based on the universal Intel x86 architecture.
> > [...]
> >
> > Are they saying that programming this chip will be easier than programming a GPU because it honors the well
> > established x86 arch?
>
> That's rubbish indeed. The cache coherency seems to be the only advantage
> as other GPU also support C. However the claimed x86 "compatibility" isn't. If
> you use C the ISA doesn't matter much, and if you write assembler then there is
> no compatibility as the new SIMD instructions don't exist on any current x86's
> and Larrabee doesn't appear to support SSE instructions either...
>
> It would have made far more sense to use a simpler and more streamlined
> ISA which would give a significant codesize, area and power saving, if not
> a performance boost. But Intel is always keen to push their inefficient ISA
> where it doesn't belong...
>
> Wilco

Maybe the special sauce is in the interconnect. They said:

"Ring network: Larrabee uses a 1024 bits-wide, bi-directional ring
network (i.e., 512 bits in each direction) to allow agents to
communicate with each other in low latency manner resulting in super
fast communication between cores."

I'm guessing you could build a pretty nice cache coherency network
if you never had to go off chip, though I'm trying to imagine how
a bi-ring network (a 2 directional token ring????) fits into that.

Eric